1. Field of the Invention
The present invention relates generally to alignment targets, and more specifically to semiconductor wafer alignment target(s) used in photolithography.
2. Related Art
The manufacture of semiconductor devices is primarily accomplished with photolithographic techniques. During the manufacturing process, multiple layers of a circuit pattern are built up on a semiconductor wafer. This is accomplished by projecting an image on a mask or reticle containing the circuit pattern onto a wafer coated with a photosensitive resist. Feature sizes imaged onto the semiconductor wafer are typically in the range of 0.15 microns or smaller. Due to the extremely small feature sizes and the requirement to expose multiple layers as part of the manufacturing process, the use of an alignment system to align the mask image on the semiconductor wafer is required. Often, the alignment accuracies necessary are in the range of 0.035 microns or less.
Generally, an alignment system includes a wafer having a wafer target thereon and a mask having a mask target thereon. The wafer target and mask target are aligned with respect to each other. In the manufacture of semiconductor wafers, processing variables such as wafer characteristics, number, thickness, and type of surface layers, often make alignment difficult. The variation in an alignment signal is a function of these processing variables and is referred to as process sensitivity. This process sensitivity often complicates the ability of an alignment system to accurately obtain the position of alignment marks (or targets) placed on a wafer.
Asymmetric processes also complicate the ability of an alignment system to accurately obtain the position of alignment targets placed on a wafer. Such asymmetric processes include (but are not limited to) chemical mechanical polishing (CMP) and deposition, both of which adversely affect alignment targets. Generally, CMP is an abrasive process used for polishing the surface of the semiconductor wafer flat. This process can be performed on both oxides and metals. CMP involves the use of chemical slurries and a circular (sanding) action to polish the surface of the wafer smooth. The smooth surface of the wafer is necessary to maintain photolithographic depth of focus for subsequent steps and also to ensure that aluminum interconnects are not deformed over contour steps. Deposition relates generally to the deposit of particles on the semiconductor wafer with known particle type, size and location.
Asymmetric processes cause great distress to the alignment community as most alignment systems have no way of detecting the asymmetry in an alignment target. What is needed is a way for allowing alignment systems to measure and model target asymmetry, as well as to custom design and/or tune target geometries, which can compensate for asymmetrical processes and produce a symmetric target and enhanced signal, or use the varying degrees of asymmetry forced by the target design to map the process.